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Machine code

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</style><div role="note" class="hatnote navigation-not-searchable">For code that is completely internal to some CPUs and normally inaccessible to programmers, see <a href="Microcode" title="Microcode">Microcode</a>.</div>

<div role="note" class="hatnote navigation-not-searchable">"Native code" redirects here. For the French colonial legal system, see <a href="Native_code_(France)" title="Native code (France)">Native code (France)</a>.</div>

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</style><table class="sidebar nomobile nowraplinks"><tbody><tr><th class="sidebar-title"><a href="Execution_(computing)" title="Execution (computing)">Program execution</a></th></tr><tr><th class="sidebar-heading">

General concepts</th></tr><tr><td class="sidebar-content hlist">

<li><a href="Translator_(computing)" title="Translator (computing)">Translation</a>

<ul><li><a href="Compiler" title="Compiler">Compiler</a></li>

<li><a href="Compile_time" title="Compile time">Compile time</a></li>

<li><a href="Optimizing_compiler" title="Optimizing compiler">Optimizing compiler</a></li></ul></li>

<li><a href="Linker_(computing)" title="Linker (computing)"> Linking</a></li>

<li><a href="Execution_(computing)" title="Execution (computing)">Execution</a>

<ul><li><a href="Runtime_system" title="Runtime system">Runtime system</a></li>

<li><a href="Executable" title="Executable">Executable</a></li>

<li><a href="Interpreter_(computing)" title="Interpreter (computing)">Interpreter</a></li>

<li><a href="Virtual_machine" title="Virtual machine">Virtual machine</a></li></ul></li>

<li><a href="Intermediate_representation" title="Intermediate representation">Intermediate representation</a> (IR)</li></ul></td>

</tr><tr><th class="sidebar-heading">

Types of code</th></tr><tr><td class="sidebar-content hlist">

<ul><li><a href="Source_code" title="Source code">Source code</a></li>

<li><a href="Object_code" title="Object code">Object code</a></li>

<li><a href="Bytecode" title="Bytecode">Bytecode</a></li>

<li><a href="Microcode" title="Microcode">Microcode</a></li></ul></td>

</tr><tr><th class="sidebar-heading">

Compilation strategies</th></tr><tr><td class="sidebar-content hlist">

<ul><li><a href="Ahead-of-time_compilation" title="Ahead-of-time compilation">Ahead-of-time</a> (AOT)</li>

<li><a href="Just-in-time_compilation" title="Just-in-time compilation">Just-in-time</a> (JIT)

<ul><li><a href="Tracing_just-in-time_compilation" title="Tracing just-in-time compilation">Tracing just-in-time</a></li>

<li><a href="Compile_and_go_system" title="Compile and go system">Compile and go system</a></li></ul></li>

<li><a href="Precompilation" class="mw-redirect" title="Precompilation">Precompilation</a></li>

<li><a href="Source-to-source_compiler" title="Source-to-source compiler">Transcompilation</a></li>

<li><a href="Dynamic_recompilation" title="Dynamic recompilation">Recompilation</a></li></ul></td>

</tr><tr><th class="sidebar-heading">

Notable runtimes</th></tr><tr><td class="sidebar-content hlist">

<ul><li><a href="Android_Runtime" title="Android Runtime">Android Runtime</a> (ART)</li>

<li><a href="BEAM_(Erlang_virtual_machine)" title="BEAM (Erlang virtual machine)">BEAM</a> (Erlang)</li>

<li><a href="Common_Language_Runtime" title="Common Language Runtime">Common Language Runtime</a> (CLR) and <a href="Mono_(software)#Code_Execution_Engine" title="Mono (software)">Mono</a></li>

<li><a href="CPython" title="CPython">CPython</a> and <a href="PyPy" title="PyPy">PyPy</a></li>

<li><a href="Crt0" title="Crt0">crt0</a> (<a href="C_(programming_language)" title="C (programming language)">C</a> target-specific initializer)</li>

<li><a href="Java_virtual_machine" title="Java virtual machine">Java virtual machine</a> (JVM)</li>

<li><a href="LuaJIT" title="LuaJIT">LuaJIT</a></li>

<li><a href="Objective-C" title="Objective-C">Objective-C</a> and <a href="Swift_(programming_language)" title="Swift (programming language)">Swift</a>'s</li>

<li><a href="Zend_Engine" title="Zend Engine">Zend Engine</a> (PHP)</li></ul></td>

</tr><tr><th class="sidebar-heading">

Notable compilers & toolchains</th></tr><tr><td class="sidebar-content hlist">

<ul><li><a href="GNU_Compiler_Collection" title="GNU Compiler Collection">GNU Compiler Collection</a> (GCC)</li>

<li><a href="LLVM" title="LLVM">LLVM</a> and <a href="Clang" title="Clang">Clang</a></li>

<li><a href="Glasgow_Haskell_Compiler" title="Glasgow Haskell Compiler">Glasgow Haskell Compiler</a> (GHC)</li></ul></td>

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In <a href="Computing" title="Computing">computing</a>, machine code is <a href="Data" title="Data">data</a> <a href="Encoded" class="mw-redirect" title="Encoded">encoded</a> and structured to control a <a href="Computer" title="Computer">computer</a>'s <a href="Central_processing_unit" title="Central processing unit">central processing unit</a> (CPU) via its programmable <a href="Interface_(computing)" title="Interface (computing)">interface</a>. A <a href="Computer_program" title="Computer program">computer program</a> consists primarily of sequences of machine-code instructions.<a href="#cite_note-Stallings_2015-1">[1]</a> Machine code is classified as <a href="Native_(computing)" title="Native (computing)">native</a> with respect to its host CPU since it is the language that CPU interprets directly.<a href="#cite_note-Managed-2">[2]</a> A <a href="Interpreter_(software)" class="mw-redirect" title="Interpreter (software)">software interpreter</a> is a <a href="Virtual_machine" title="Virtual machine">virtual machine</a> that processes virtual machine code.

A machine-code instruction causes the CPU to perform a specific task such as:

<ul><li>Load a <a href="Word_(computer_architecture)" title="Word (computer architecture)">word</a> from <a href="Random-access_memory" title="Random-access memory">memory</a> to a <a href="Processor_register" title="Processor register">CPU register</a></li>

<li>Execute an <a href="Arithmetic_logic_unit" title="Arithmetic logic unit">arithmetic logic unit</a> (ALU) operation on one or more registers or memory locations</li>

<li><a href="Jump_instruction" class="mw-redirect" title="Jump instruction">Jump</a> or <a href="Addressing_mode#Skip" title="Addressing mode">skip</a> to an instruction that is not the next one</li></ul>

An <a href="Instruction_set_architecture" title="Instruction set architecture">instruction set architecture</a> (ISA) defines the interface to a CPU and varies by groupings or families of CPU design such as <a href="X86" title="X86">x86</a> and <a href="ARM_architecture_family" title="ARM architecture family">ARM</a>. Generally, machine code compatible with one family is not with others, but there are exceptions. The <a href="VAX" title="VAX">VAX</a> architecture includes optional support of the <a href="PDP-11" title="PDP-11">PDP-11</a> instruction set. The <a href="IA-64" title="IA-64">IA-64</a> architecture includes optional support of the <a href="IA-32" title="IA-32">IA-32</a> instruction set. And, the <a href="PowerPC_600#PowerPC_615" title="PowerPC 600">PowerPC 615</a> can natively process both <a href="PowerPC" title="PowerPC">PowerPC</a> and x86 instructions.

<div class="mw-heading mw-heading2"><h2 id="Higher-level_languages">Higher-level languages</h2></div>

<a href="Assembly_language" title="Assembly language">Assembly language</a> provides a relatively direct mapping from a <a href="Human-readable" class="mw-redirect" title="Human-readable">human-readable</a> <a href="Source_code" title="Source code">source code</a> to machine code. The source code represents numerical codes as mnemonics and labels.<a href="#cite_note-Dourish_2004-3">[3]</a> For example, <code><a href="NOP_(code)" title="NOP (code)">NOP</a></code> represents the <a href="X86" title="X86">x86</a> architecture <a href="Opcode" title="Opcode">opcode</a> 0x90. While it is possible to write a program in machine code, doing so is tedious and error-prone. Therefore, programs are usually written in a higher-level language such as assembly but today most are written in an even <a href="High-level_programming_language" title="High-level programming language">higher-level language</a>.

<div class="mw-heading mw-heading2"><h2 id="Instruction_set">Instruction set</h2></div>

A machine instruction encodes an operation as a pattern of <a href="Bit" title="Bit">bits</a> based on the specified format for the machine's instruction set.<a href="#cite_note-4">[nb 1]</a><a href="#cite_note-sco-p251-5">[4]</a>

Instruction sets differ in various ways. Instructions of a set might all be the same length or different instructions might have different lengths. The number of instructions may be relatively small or large. Instructions may or may not align with the architecture's <a href="Word_(computer_architecture)" title="Word (computer architecture)">word length</a><a href="#cite_note-sco-p251-5">[4]</a>

An instruction set needs to execute the circuits of a computer's <a href="Logic_level" title="Logic level">digital logic level</a>. At the digital level, the program needs to control the computer's registers, bus, memory, ALU, and other hardware components.<a href="#cite_note-sco-p162-6">[5]</a> To control a computer's <a href="Computer_architecture" title="Computer architecture">architectural</a> features, machine instructions are created. Examples of features that are controlled using machine instructions:

<ul><li><a href="Memory_segmentation" title="Memory segmentation">segment registers</a><a href="#cite_note-sco-p231-7">[6]</a></li>

<li><a href="Protected_mode" title="Protected mode">protected address mode</a><a href="#cite_note-sco-p237-8">[7]</a></li>

<li><a href="Binary-coded_decimal" title="Binary-coded decimal">binary-coded decimal</a> (BCD) arithmetic<a href="#cite_note-sco-p236-9">[8]</a></li></ul>

The criteria for instruction formats include:

<ul><li>Instructions most commonly used should be shorter than instructions rarely used.<a href="#cite_note-sco-p251-5">[4]</a></li>

<li>The <a href="High_Bandwidth_Memory" title="High Bandwidth Memory">memory transfer rate</a> of the underlying hardware determines the flexibility of the memory fetch instructions.</li>

<li>The number of bits in the <a href="Random-access_memory#Addressing" title="Random-access memory">address field</a> requires special consideration.<a href="#cite_note-sco-p253-10">[9]</a></li></ul>

Determining the size of the address field is a choice between space and speed.<a href="#cite_note-sco-p253-10">[9]</a> On some computers, the number of bits in the address field may be too small to access all of the physical memory. Also, <a href="Virtual_address_space" title="Virtual address space">virtual address space</a> needs to be considered. Another constraint may be a limitation on the size of registers used to construct the address. Whereas a shorter address field allows the instructions to execute more quickly, other physical properties need to be considered when designing the instruction format.

Instructions can be separated into two types: general-purpose and special-purpose. Special-purpose instructions exploit architectural features that are unique to a computer. General-purpose instructions control architectural features common to all computers.<a href="#cite_note-sco-p283-11">[10]</a>

General-purpose instructions control:

<ul><li>Data movement from one place to another</li>

<li>Monadic operations that have one <a href="Operand" title="Operand">operand</a> to produce a result</li>

<li>Dyadic operations that have two operands to produce a result</li>

<li>Comparisons and conditional jumps</li>

<li>Procedure calls</li>

<li>Loop control</li>

<li>Input/output</li></ul>

<div class="mw-heading mw-heading3"><h3 id="Overlapping_instruction">Overlapping instruction</h3></div>

On processor architectures with <a href="Variable-length_instruction_set" class="mw-redirect" title="Variable-length instruction set">variable-length instruction sets</a><a href="#cite_note-Jacob-Jakubowski-Venkatesan_2007-12">[11]</a> (such as <a href="Intel" title="Intel">Intel</a>'s <a href="X86" title="X86">x86</a> processor family) it is, within the limits of the control-flow <a href="Self-synchronizing_code" title="Self-synchronizing code">resynchronizing</a> phenomenon known as the <a href="Kruskal_count" title="Kruskal count">Kruskal count</a>,<a href="#cite_note-Lagarias-Rains-Vanderbei_2001-13">[12]</a><a href="#cite_note-Jacob-Jakubowski-Venkatesan_2007-12">[11]</a><a href="#cite_note-Andriesse-Bos_2014-14">[13]</a><a href="#cite_note-Jakubowski_2016-15">[14]</a><a href="#cite_note-Jämthagen_2016-16">[15]</a> sometimes possible through opcode-level programming to deliberately arrange the resulting code so that two code paths share a common fragment of opcode sequences.<a href="#cite_note-NB_Merging_or_branching-17">[nb 2]</a> These are called overlapping instructions, overlapping opcodes, overlapping code, overlapped code, instruction scission, or jump into the middle of an instruction.<a href="#cite_note-HN_2021-18">[16]</a><a href="#cite_note-Kinder_2010-19">[17]</a><a href="#cite_note-RE_2013-20">[18]</a>

In the 1970s and 1980s, overlapping instructions were sometimes used to preserve memory space. One example were in the implementation of error tables in <a href="Microsoft" title="Microsoft">Microsoft</a>'s <a href="Altair_BASIC" title="Altair BASIC">Altair BASIC</a>, where interleaved instructions mutually shared their instruction bytes.<a href="#cite_note-Gates-21">[19]</a><a href="#cite_note-Jacob-Jakubowski-Venkatesan_2007-12">[11]</a><a href="#cite_note-HN_2021-18">[16]</a> The technique is rarely used today, but might still be necessary to resort to in areas where extreme optimization for size is necessary on byte-level such as in the implementation of <a href="Boot_loader" class="mw-redirect" title="Boot loader">boot loaders</a> which have to fit into <a href="Boot_sector" title="Boot sector">boot sectors</a>.<a href="#cite_note-NB_DR-DOS_707-22">[nb 3]</a>

It is also sometimes used as a <a href="Code_obfuscation" class="mw-redirect" title="Code obfuscation">code obfuscation</a> technique as a measure against <a href="Disassembly" class="mw-redirect" title="Disassembly">disassembly</a> and tampering.<a href="#cite_note-Jacob-Jakubowski-Venkatesan_2007-12">[11]</a><a href="#cite_note-Jakubowski_2016-15">[14]</a>

The principle is also used in shared code sequences of <a href="Fat_binaries" class="mw-redirect" title="Fat binaries">fat binaries</a> which must run on multiple instruction-set-incompatible processor platforms.<a href="#cite_note-NB_Merging_or_branching-17">[nb 2]</a>

This property is also used to find <a href="Unintended_instruction" class="mw-redirect" title="Unintended instruction">unintended instructions</a> called <a href="Gadget_(machine_instruction_sequence)" class="mw-redirect" title="Gadget (machine instruction sequence)">gadgets</a> in existing code repositories and is used in <a href="Return-oriented_programming" title="Return-oriented programming">return-oriented programming</a> as alternative to <a href="Code_injection" title="Code injection">code injection</a> for exploits such as <a href="Return-to-libc_attack" title="Return-to-libc attack">return-to-libc attacks</a>.<a href="#cite_note-Shacham_2007-23">[20]</a><a href="#cite_note-Jacob-Jakubowski-Venkatesan_2007-12">[11]</a>

<div class="mw-heading mw-heading3"><h3 id="Microcode">Microcode</h3></div>

In some computers, the machine code of the <a href="Computer_architecture" title="Computer architecture">architecture</a> is implemented by an even more fundamental underlying layer called <a href="Microcode" title="Microcode">microcode</a>, providing a common machine language interface across a line or family of different models of computer with widely different underlying <a href="Dataflow" title="Dataflow">dataflows</a>. This is done to facilitate <a href="Porting" title="Porting">porting</a> of machine language programs between different models.<a href="#cite_note-24">[21]</a> An example of this use is the IBM <a href="System/360" class="mw-redirect" title="System/360">System/360</a> family of computers and their successors.<a href="#cite_note-25">[22]</a>

<div class="mw-heading mw-heading2"><h2 id="Examples">Examples</h2></div>

The <a href="IBM_700/7000_series#Later_scientific_architecture_(704/709/7090/7094)" title="IBM 700/7000 series">IBM 704, 709, 704x and 709x</a> store one instruction in each instruction word; IBM numbers the bit from the left as S, 1, ..., 35. Most instructions have one of two formats:

<dl><dt>Generic</dt>

<dd>12-13 Flag, ignored in some instructions</dd>

<dd>14-17 unused</dd>

<dl><dt>Index register control, other than TSX</dt>

<dd>S,1-2 Opcode</dd>

<dd>3-17 Decrement</dd>

For all but the <a href="IBM_7094" class="mw-redirect" title="IBM 7094">IBM 7094</a> and 7094 II, there are three index registers designated A, B and C; indexing with multiple 1 bits in the tag subtracts the <a href="Logical_or" class="mw-redirect" title="Logical or">logical or</a> of the selected index registers and loading with multiple 1 bits in the tag loads all of the selected index registers. The 7094 and 7094 II have seven index registers, but when they are powered on they are in multiple tag mode, in which they use only the three of the index registers in a fashion compatible with earlier machines, and require a Leave Multiple Tag Mode (LMTM) instruction in order to access the other four index registers.

The effective address is normally Y-C(T), where C(T) is either 0 for a tag of 0, the logical or of the selected index registers in multiple tag mode or the selected index register if not in multiple tag mode. However, the effective address for index register control instructions is just Y.

A flag with both bits 1 selects indirect addressing; the indirect address word has both a tag and a Y field.

In addition to transfer (branch) instructions, these machines have skip instruction that conditionally skip one or two words, e.g., Compare Accumulator with Storage (CAS) does a three way compare and conditionally skips to NSI, NSI+1 or NSI+2, depending on the result.

The <a href="MIPS_architecture" title="MIPS architecture">MIPS architecture</a> provides a specific example for a machine code whose instructions are always 32 bits long.<a href="#cite_note-Harris_2007-26">[23]</a>: 299 The general type of instruction is given by the op (operation) field, the highest 6 bits. J-type (jump) and I-type (immediate) instructions are fully specified by op. R-type (register) instructions include an additional field funct to determine the exact operation. The fields used in these types are:

<pre> 6 5 5 5 5 6 bits

[ op | rs | rt | rd |shamt| funct] R-type

[ op | rs | rt | address/immediate] I-type

[ op | target address ] J-type

</pre>

rs, rt, and rd indicate register operands; shamt gives a shift amount; and the address or immediate fields contain an operand directly.<a href="#cite_note-Harris_2007-26">[23]</a>: 299–301

For example, adding the registers 1 and 2 and placing the result in register 6 is encoded:<a href="#cite_note-Harris_2007-26">[23]</a>: 554

<pre>[ op | rs | rt | rd |shamt| funct]

0 1 2 6 0 32 decimal

000000 00001 00010 00110 00000 100000 binary

</pre>

Load a value into register 8, taken from the memory cell 68 cells after the location listed in register 3:<a href="#cite_note-Harris_2007-26">[23]</a>: 552

<pre>[ op | rs | rt | address/immediate]

35 3 8 68 decimal

100011 00011 01000 00000 00001 000100 binary

</pre>

Jumping to the address 1024:<a href="#cite_note-Harris_2007-26">[23]</a>: 552

<pre>[ op | target address ]

2 1024 decimal

000010 00000 00000 00000 10000 000000 binary

</pre>

<div class="mw-heading mw-heading2"><h2 id="Bytecode">Bytecode</h2></div>

Machine code is similar to yet fundamentally different from <a href="Bytecode" title="Bytecode">bytecode</a>. Like machine code, bytecode is typically generated (i.e. by a compiler) from source code. But, unlike machine code, bytecode is not directly executable by a CPU. An exception is if a processor is designed to use bytecode as its machine code, such as the <a href="Java_processor" title="Java processor">Java processor</a>. If bytecode is processed by an software interpreter, then that interpreter is a <a href="Virtual_machine" title="Virtual machine">virtual machine</a> for which the bytecode is its machine code.

<div class="mw-heading mw-heading2"><h2 id="Storage">Storage</h2></div>

During execution, machine code is generally stored in RAM although running form ROM is supported by some devices. Regardless, the code may also be cached in more specialized memory to enhance performance. There may be different caches for instructions and data, depending on the architecture.<a href="#cite_note-27">[24]</a>

From the point of view of a <a href="Process_(computing)" title="Process (computing)">process</a>, the machine code lives in code space, a designated part of its <a href="Virtual_address_space" title="Virtual address space">address space</a>. In a <a href="Thread_(computing)" title="Thread (computing)">multi-threading</a> environment, different threads of one process share code space along with data space, which reduces the overhead of <a href="Context_switching" class="mw-redirect" title="Context switching">context switching</a> considerably as compared to process switching.<a href="#cite_note-:2-28">[25]</a>

<div class="mw-heading mw-heading2"><h2 id="Readability">Readability</h2></div>

Machine code is generally considered to be not human readable,<a href="#cite_note-FOOTNOTESamuelson1984683-29">[26]</a> with <a href="Douglas_Hofstadter" title="Douglas Hofstadter">Douglas Hofstadter</a> comparing it to examining the atoms of a <a href="DNA" title="DNA">DNA</a> molecule.<a href="#cite_note-FOOTNOTEHofstadter1979[httpsarchiveorgdetailsgodelescherbach00dougpage290_290]-30">[27]</a> However, various tools and methods support understanding machine code.

<a href="Disassembly" class="mw-redirect" title="Disassembly">Disassembly</a> decodes machine code to assembly language which is possible since assembly instructions can often be mapped one-to-one to machine instructions.<a href="#cite_note-FOOTNOTETanenbaum1990[httpsarchiveorgdetailsstructuredcomput00tanepage398_398]-31">[28]</a>

A <a href="Decompiler" title="Decompiler">decompiler</a> converts machine code to a <a href="High-level_programming_language" title="High-level programming language">high-level language</a>, but the result can be relatively <a href="Obfuscation_(software)" title="Obfuscation (software)">obfuscated</a>; hard to understand.

A program can be associated with <a href="Debug_symbol" title="Debug symbol">debug symbols</a> (either embedded in the executable or in a separate file) that allow it to be mapped to external source code. A <a href="Debugger" title="Debugger">debugger</a> reads the symbols to help a programmer interactively <a href="Debugging" title="Debugging">debug</a> the program. Example include:

<ul><li>The <a href="SHARE_Operating_System" title="SHARE Operating System">SHARE Operating System</a> (1959) for the <a href="IBM_709" title="IBM 709">IBM 709</a>, <a href="IBM_7090" title="IBM 7090">IBM 7090</a>, and <a href="IBM_7094" class="mw-redirect" title="IBM 7094">IBM 7094</a> computers allowed for an loadable code format named <a href="SQUOZE" title="SQUOZE">SQUOZE</a>. SQUOZE was a compressed binary form of <a href="Assembly_language" title="Assembly language">assembly language</a> code and included a symbol table.</li>

<li>Modern IBM mainframe <a href="Operating_system" title="Operating system">operating systems</a>, such as <a href="Z/OS" title="Z/OS">z/OS</a>, have available a symbol table named Associated data (ADATA). The table is stored in a file that can be produced by the <a href="IBM_High-Level_Assembler" class="mw-redirect" title="IBM High-Level Assembler">IBM High-Level Assembler</a> (HLASM),<a href="#cite_note-IBM_ADA-32">[29]</a><a href="#cite_note-IBM_ADATA-33">[30]</a> IBM's <a href="COBOL" title="COBOL">COBOL</a> compiler,<a href="#cite_note-IBM_COBOL-34">[31]</a> and IBM's <a href="PL/I" title="PL/I">PL/I</a> compiler,<a href="#cite_note-35">[32]</a> either as a separate SYSADATA file or as ADATA records in a <a href="Generalized_object_output_file" class="mw-redirect" title="Generalized object output file">Generalized object output file</a> (GOFF).<a href="#cite_note-IBM_GOFF-36">[33]</a> This obsoletes the TEST records from <a href="OS/360" class="mw-redirect" title="OS/360">OS/360</a>, although it is still possible to request them and to use them in the <a href="Time_Sharing_Option" title="Time Sharing Option">TSO</a> TEST command.</li>

<li><a href="Windows" class="mw-redirect" title="Windows">Windows</a> uses a symbol table<a href="#cite_note-Microsoft_Symbols-37">[34]</a> that is stored in a <a href="Program_database" title="Program database">program database</a> (<style data-mw-deduplicate="TemplateStyles:r886049734">

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</style>.pdb) file.<a href="#cite_note-Microsoft_PDB-38">[35]</a></li>

<li>Most <a href="Unix-like" title="Unix-like">Unix-like</a> operating systems have available symbol table formats named <a href="Stabs" title="Stabs">stabs</a> and <a href="DWARF" title="DWARF">DWARF</a>. In <a href="MacOS" title="MacOS">macOS</a> and other <a href="Darwin_(operating_system)" title="Darwin (operating system)">Darwin</a>-based operating systems, the debug symbols are stored in DWARF format in a separate .dSYM file.</li></ul>

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<div class="side-box-text plainlist">Look up <a href="https://en.wiktionary.org/wiki/machine_code" class="extiw external" title="wiktionary:machine code">machine code</a> in Wiktionary, the free dictionary.</div></div>

</div>

<ul><li><a href="Computer_code" class="mw-disambig" title="Computer code">Computer code</a></li>

<li><a href="Endianness" title="Endianness">Endianness</a> – Order of bytes in a computer word</li>

<li><a href="List_of_programming_languages_by_type#Machine_languages" title="List of programming languages by type">List of machine languages</a></li>

<li><a href="Machine_code_monitor" title="Machine code monitor">Machine code monitor</a> – Software that was popular during the home computer era of the 1970s and 1980s</li>

<li><a href="Micro-Professor_MPF-I" title="Micro-Professor MPF-I">Micro-Professor MPF-I</a> – Microcomputer released by Multitech in 1981</li>

<li><a href="Object_code" title="Object code">Object code</a> – Sequence of statements or instructions in a computer language</li>

<li><a href="P-code_machine" title="P-code machine">P-code machine</a> – Programming virtual machine</li>

<li><a href="Reduced_instruction_set_computer" title="Reduced instruction set computer">Reduced instruction set computer</a> – Processor executing one instruction in minimal clock cycles (RISC)</li>

<li><a href="Very_long_instruction_word" title="Very long instruction word">Very long instruction word</a> – Processor design that offloads complexity to the compiler</li></ul>

<div class="mw-heading mw-heading2"><h2 id="Notes">Notes</h2></div>

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<li id="cite_note-4"><a href="#cite_ref-4">^</a> On early <a href="Decimal_computer" title="Decimal computer">decimal machines</a>, patterns of characters, digits and digit sign

</li>

<li id="cite_note-NB_Merging_or_branching-17">^ <a href="#cite_ref-NB_Merging_or_branching_17-0">a</a> <a href="#cite_ref-NB_Merging_or_branching_17-1">b</a> While overlapping instructions on processor architectures with <a href="Variable-length_instruction_set" class="mw-redirect" title="Variable-length instruction set">variable-length instruction sets</a> can sometimes be arranged to merge different code paths back into one through control-flow <a href="Self-synchronizing_code" title="Self-synchronizing code">resynchronization</a>, overlapping code for different processor architectures can sometimes also be crafted to cause execution paths to branch into different directions depending on the underlying processor, as is sometimes used in <a href="Fat_binaries" class="mw-redirect" title="Fat binaries">fat binaries</a>.

</li>

<li id="cite_note-NB_DR-DOS_707-22"><a href="#cite_ref-NB_DR-DOS_707_22-0">^</a> For example, the <a href="DR-DOS" title="DR-DOS">DR-DOS</a> <a href="Master_boot_record" title="Master boot record">master boot records</a> (MBRs) and <a href="Volume_boot_record" title="Volume boot record">boot sectors</a> (which also hold the <a href="Partition_table" class="mw-redirect" title="Partition table">partition table</a> and <a href="BIOS_Parameter_Block" class="mw-redirect" title="BIOS Parameter Block">BIOS Parameter Block</a>, leaving less than 446 respectively 423 bytes for the code) were traditionally able to locate the boot file in the <a href="FAT12" class="mw-redirect" title="FAT12">FAT12</a> or <a href="FAT16" class="mw-redirect" title="FAT16">FAT16</a> <a href="File_system" title="File system">file system</a> by themselves and load it into memory as a whole, in contrast to their counterparts in <a href="MS-DOS" title="MS-DOS">MS-DOS</a> and <a href="PC_DOS" class="mw-redirect" title="PC DOS">PC DOS</a>, which instead rely on the <a href="System_file" title="System file">system files</a> to occupy the first two <a href="Directory_entry" class="mw-redirect" title="Directory entry">directory entry</a> locations in the file system and the first three sectors of <a href="IBMBIO.COM" title="IBMBIO.COM">IBMBIO.COM</a> to be stored at the start of the data area in contiguous sectors containing a secondary loader to load the remainder of the file into memory (requiring <a href="SYS_(DOS_command)" class="mw-redirect" title="SYS (DOS command)">SYS</a> to take care of all these conditions). When <a href="FAT32" class="mw-redirect" title="FAT32">FAT32</a> and <a href="Logical_block_addressing" title="Logical block addressing">logical block addressing</a> (LBA) support was added, <a href="Microsoft" title="Microsoft">Microsoft</a> even switched to require <a href="I386" title="I386">i386</a> instructions and split the boot code over two sectors for code size reasons, which was no option to follow for DR-DOS as it would have broken <a href="Backward_compatibility" title="Backward compatibility">backward</a>- and cross-compatibility with other operating systems in <a href="Multi-boot" class="mw-redirect" title="Multi-boot">multi-boot</a> and <a href="Chain_load" class="mw-redirect" title="Chain load">chain load</a> scenarios, and as with older <a href="IBM_PC%E2%80%93compatible" class="mw-redirect" title="IBM PC–compatible">IBM PC–compatible</a> PCs. Instead, the <a href="DR-DOS_7.07" class="mw-redirect" title="DR-DOS 7.07">DR-DOS 7.07</a> boot sectors resorted to <a href="Self-modifying_code" title="Self-modifying code">self-modifying code</a>, <a href="Opcode" title="Opcode">opcode</a>-level programming in machine language, controlled utilization of (documented) <a href="Side_effect_(computer_science)" title="Side effect (computer science)">side effects</a>, multi-level data/code overlapping and algorithmic <a href="Fold_(higher-order_function)" title="Fold (higher-order function)">folding</a> techniques to still fit everything into a physical sector of only 512 bytes without giving up any of their extended functions.

</li>

</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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</style><cite id="CITEREFStallings2015" class="citation book cs1">Stallings, William (2015). Computer Organization and Architecture 10th edition. Pearson Prentice Hall. p. 776. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>9789332570405</bdi>.</cite>

</li>

<li id="cite_note-Managed-2"><a href="#cite_ref-Managed_2-0">^</a> <cite id="CITEREFGregory2003" class="citation web cs1">Gregory, Kate (2003-04-28). <a rel="nofollow" class="external text" href="https://web.archive.org/web/20090923210338/https://www.developer.com/net/cplus/article.php/2197621/Managed-Unmanaged-Native-What-Kind-of-Code-Is-This.htm">"Managed, Unmanaged, Native: What Kind of Code Is This?"</a>. Developer.com. Archived from <a rel="nofollow" class="external text" href="https://www.developer.com/net/cplus/article.php/2197621/Managed-Unmanaged-Native-What-Kind-of-Code-Is-This.htm">the original</a> on 2009-09-23. Retrieved 2008-09-02.</cite>

</li>

<li id="cite_note-Dourish_2004-3"><a href="#cite_ref-Dourish_2004_3-0">^</a> <cite id="CITEREFDourish2004" class="citation book cs1"><a href="Paul_Dourish" title="Paul Dourish">Dourish, Paul</a> (2004). <a rel="nofollow" class="external text" href="https://books.google.com/books?id=DCIy2zxrCqcC&pg=PA7">Where the Action is: The Foundations of Embodied Interaction</a>. <a href="MIT_Press" title="MIT Press">MIT Press</a>. p. 7. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-262-54178-5</bdi>. Retrieved 2023-03-05.</cite>

</li>

<li id="cite_note-sco-p251-5">^ <a href="#cite_ref-sco-p251_5-0">a</a> <a href="#cite_ref-sco-p251_5-1">b</a> <a href="#cite_ref-sco-p251_5-2">c</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/251">251</a>

</li>

<li id="cite_note-sco-p162-6"><a href="#cite_ref-sco-p162_6-0">^</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/162">162</a>

</li>

<li id="cite_note-sco-p231-7"><a href="#cite_ref-sco-p231_7-0">^</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/231">231</a>

</li>

<li id="cite_note-sco-p237-8"><a href="#cite_ref-sco-p237_8-0">^</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/237">237</a>

</li>

<li id="cite_note-sco-p236-9"><a href="#cite_ref-sco-p236_9-0">^</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/236">236</a>

</li>

<li id="cite_note-sco-p253-10">^ <a href="#cite_ref-sco-p253_10-0">a</a> <a href="#cite_ref-sco-p253_10-1">b</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/253">253</a>

</li>

<li id="cite_note-sco-p283-11"><a href="#cite_ref-sco-p283_11-0">^</a> <a href="#CITEREFTanenbaum1990">Tanenbaum 1990</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/283">283</a>

</li>

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<li id="cite_note-FOOTNOTEHofstadter1979[httpsarchiveorgdetailsgodelescherbach00dougpage290_290]-30"><a href="#cite_ref-FOOTNOTEHofstadter1979[httpsarchiveorgdetailsgodelescherbach00dougpage290_290]_30-0">^</a> <a href="#CITEREFHofstadter1979">Hofstadter 1979</a>, p. <a rel="nofollow" class="external text" href="https://archive.org/details/godelescherbach00doug/page/290">290</a>.

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<div class="mw-heading mw-heading2"><h2 id="Sources">Sources</h2></div>

<ul><li><cite id="CITEREFHofstadter1979" class="citation book cs1"><a href="Douglas_Hofstadter" title="Douglas Hofstadter">Hofstadter, Douglas R.</a> (1979). <a rel="nofollow" class="external text" href="https://archive.org/details/godelescherbach00doug">Gödel, Escher, Bach: An Eternal Golden Braid</a>. <a href="Basic_Books" title="Basic Books">Basic Books</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-465-02685-0</bdi>. Retrieved 2025-02-10.</cite></li>

<li><cite id="CITEREFSamuelson1984" class="citation journal cs1"><a href="Pamela_Samuelson" title="Pamela Samuelson">Samuelson, Pamela</a> (1984). <a rel="nofollow" class="external text" href="https://scholarship.law.duke.edu/dlj/vol33/iss4/2">"CONTU Revisited: The Case Against Copyright Protection for Computer Programs in Machine-Readable Form"</a>. <a href="Duke_Law_Journal" title="Duke Law Journal">Duke Law Journal</a>. 33 (4): 663–769. <a href="Doi_(identifier)" class="mw-redirect" title="Doi (identifier)">doi</a>:<a rel="nofollow" class="external text" href="https://doi.org/10.2307%2F1372418">10.2307/1372418</a>. <a href="Hdl_(identifier)" class="mw-redirect" title="Hdl (identifier)">hdl</a>:<a rel="nofollow" class="external text" href="https://hdl.handle.net/hein.journals%2Fduklr1984">hein.journals/duklr1984</a>. <a href="JSTOR_(identifier)" class="mw-redirect" title="JSTOR (identifier)">JSTOR</a> <a rel="nofollow" class="external text" href="https://www.jstor.org/stable/1372418">1372418</a>. Retrieved 2025-02-10.</cite></li>

<li><cite id="CITEREFTanenbaum1990" class="citation book cs1"><a href="Andrew_S._Tanenbaum" title="Andrew S. Tanenbaum">Tanenbaum, Andrew S.</a> (1990). <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/398">Structured Computer Organization, Third Edition</a>. Prentice Hall. p. <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput00tane/page/398">398</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-0-13-854662-5</bdi>.</cite></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Further_reading">Further reading</h2></div>

<ul><li><cite id="CITEREFHennessyPatterson1994" class="citation book cs1"><a href="John_L._Hennessy" title="John L. Hennessy">Hennessy, John L.</a>; <a href="David_A._Patterson_(scientist)" class="mw-redirect" title="David A. Patterson (scientist)">Patterson, David A.</a> (1994). <a rel="nofollow" class="external text" href="https://archive.org/details/computerorganiza00henn">Computer Organization and Design. The Hardware/Software Interface</a>. <a href="Morgan_Kaufmann_Publishers" title="Morgan Kaufmann Publishers">Morgan Kaufmann Publishers</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>1-55860-281-X</bdi>.</cite></li>

<li><cite id="CITEREFTanenbaum1999" class="citation book cs1"><a href="Andrew_S._Tanenbaum" title="Andrew S. Tanenbaum">Tanenbaum, Andrew S.</a> (1999). <a rel="nofollow" class="external text" href="https://archive.org/details/structuredcomput0000tane_x7x6">Structured Computer Organization</a> (Fourth ed.). <a href="Prentice_Hall" title="Prentice Hall">Prentice Hall</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>0-13-020435-8</bdi>. Retrieved 2025-02-10.</cite></li>

<li><cite id="CITEREFBrookshear2007" class="citation book cs1">Brookshear, J. Glenn (2007). <a rel="nofollow" class="external text" href="https://archive.org/details/computerscienceo0000broo_e5b8">Computer Science: An Overview</a> (Ninth ed.). <a href="Addison_Wesley" class="mw-redirect" title="Addison Wesley">Addison Wesley</a>. <a href="ISBN_(identifier)" class="mw-redirect" title="ISBN (identifier)">ISBN</a> <bdi>978-0-321-38701-1</bdi>. Retrieved 2025-02-10.</cite></li></ul>

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<ul><li><a href="Data_structure_alignment" title="Data structure alignment">Alignment</a></li>

<li><a href="Calling_convention" title="Calling convention">Calling convention</a></li>

<li><a href="Call_stack" title="Call stack">Call stack</a></li>

<li><a href="Library_(computing)" title="Library (computing)">Library</a>

<ul><li><a href="Static_library" title="Static library">static</a></li></ul></li>

<li><a href="Memory_segmentation" title="Memory segmentation">Memory segmentation</a></li>

<li><a href="Name_mangling" title="Name mangling">Name mangling</a></li>

<li><a href="Object_code" title="Object code">Object code</a></li>

<li><a href="Opaque_pointer" title="Opaque pointer">Opaque pointer</a></li>

<li><a href="Position-independent_code" title="Position-independent code">Position-independent code</a></li>

<li><a href="Relocation_(computing)" title="Relocation (computing)">Relocation</a></li>

<li><a href="System_call" title="System call">System call</a></li>

<li><a href="Virtual_method_table" title="Virtual method table">Virtual method table</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related topics</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Binary-code_compatibility" title="Binary-code compatibility">Binary-code compatibility</a></li>

<li><a href="Foreign_function_interface" title="Foreign function interface">Foreign function interface</a></li>

<li><a href="Language_binding" title="Language binding">Language binding</a></li>

<li><a href="Linker_(computing)" title="Linker (computing)">Linker</a>

<ul><li><a href="Dynamic_linker" title="Dynamic linker">dynamic</a></li></ul></li>

<li><a href="Loader_(computing)" title="Loader (computing)">Loader</a></li>

<li><a href="Year_2038_problem" title="Year 2038 problem">Year 2038 problem</a></li></ul>

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<ul>

<li><a href="Assembly_language" title="Assembly language">Assembly</a></li>

<li><a href="Compiled_language" title="Compiled language">Compiled</a></li>

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<li><a href="High-level_programming_language" title="High-level programming language">High-level</a></li>

<li><a href="Very_high-level_programming_language" title="Very high-level programming language">Very high-level</a></li>

<li><a href="Esoteric_programming_language" title="Esoteric programming language">Esoteric</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="Programming_language_generations" title="Programming language generations">Generation</a></th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="First-generation_programming_language" title="First-generation programming language">First</a></li>

<li><a href="Second-generation_programming_language" title="Second-generation programming language">Second</a></li>

<li><a href="Third-generation_programming_language" title="Third-generation programming language">Third</a></li>

<li><a href="Fourth-generation_programming_language" title="Fourth-generation programming language">Fourth</a></li>

<li><a href="Fifth-generation_programming_language" title="Fifth-generation programming language">Fifth</a></li></ul>

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